The HyperTransport (HT) Consortium releases specs for version 3 of its high-speed interface

The HyperTransport (HT) Consortium has released the specifications for version 3 of its high-speed interface, which is used to connect CPUs to the rest of a computer’s hardware.

HT is used most notably by AMD in its 64bit Opteron processors, and is also used by other manufacturers, including Cisco.

Systems featuring the new link are expected to go on sale later this year. The new specifications compare favourably to those of Intel’s Xeon-based front-side bus (FSB) alternative.

Version 3 HT links have a maximum bandwidth of 20.8GB/s, and two links can be aggregated to provide double that bandwidth.

The fastest comparable FSB speeds offered by Intel this year are expected to be 10.6GB/s. However, Intel’s FSB design uses a common bus that shares the total bandwidth with up to four devices, while HT provides dedicated point-to-point links that provide the full bandwidth between two components in a system.

The new specifications should reassure buyers of Opteron-based systems that forthcoming products will continue to offer good price/performance ratios compared with server hardware based on other technologies.

The consortium is made up of vendors with an interest in the HyperTransport bus, including IBM, Cisco and Sun. HT itself is derived from the Alpha EV7 bus.

In separate news, industry analyst company Mercury Research said last week that Opteron CPUs were fitted in 22 percent of all x86 systems sold worldwide during the first three months of the year, up from just over 16 percent for the last three months of 2005.