Intel has unveiled the Silverton platform at the Intel Developer Forum in San Francisco.

The prototype promises significant power savings by powering down components such as the graphics processor or memory when the system is idle.

Cutting down on power consumption is the logical next step in the platform's development. As Intel crafts more power-efficient processors, the platform starts taking a larger chunk of the overall power, Intel's chief technology officer Justin Rattner argued in an opening keynote at IDF.

"The potential of managing power on the platform level is really great," he told delegates.

The breakdown in power consumption between the processor and the platform in current-generation systems is about 50-50. Intel's new power efficient processors move that to roughly 33-67, Rattner claimed.

Intel unveiled its new micro-architecture for processors at the last IDF, saying that it would base the forthcoming desktop and server chips on the power efficient Banias architecture in the Pentium M.

In his keynote Rattner officially presented this new Core micro-architecture, which had remained unnamed until now.

Rattner highlighted the micro-architecture's Wide Dynamic Execution technology which allows it execute up to four instructions in a single chip cycle, limiting the number of calculations that a chip has to perform.

A technology dubbed Macro Fusion combines two instructions into one, while the new MMS technology delivers improved processing of multimedia such as audio, video and digital photos.

The micro-architecture boasts a single batch of L2 cache memory shared by both processor cores, allowing one core to use all memory when the other one is powered down.

Finally, the Core micro-architecture introduces a feature dubbed Smart Memory Access that pre-fetches memory into the cache, which again promises improved performance and power savings.

The introduction of the Core micro-architecture is set to deliver a 40 per cent performance boost for the Conroe desktop processors while cutting power consumption by another 40 per cent.

The forthcoming Woodcrest server chip is expected to speed up by 80 per cent and cut power consumption by 30 per cent, Rattner said. Both chips are scheduled for availability later this year.

Following Rattner's presentation, Pat Gelsinger, general manager at Intel's Digital Enterprise Group, gave a first public demonstration of the quad-core Kentsfield processor slated for release early next year.

Gordon Haff, a senior analyst at Illuminata, said: "The numbers are compelling. It does not mean that Intel has won the battle, but it is certainly back in the game."

Haff pointed out, however, that Intel's decision to move forward with the Banias micro-architecture constitutes a moral defeat for the company as it is abandoning the Netburst architecture that was at the centre of the Xeon and Penium 4 processors.